Static information storage and retrieval – Read/write circuit – Erase
Patent
1996-07-09
1997-08-19
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Erase
365201, 36523006, G11C 1300
Patent
active
056595140
ABSTRACT:
A current mirror circuit for fast programming of semiconductor memory cells and for ease of testing and verifying the condition of the memory chips. The current mirror includes a reference branch and multiple output branches. At least one output branch connects to a programmable memory cell through FET transistors and the programming current flows from the output branch to the memory cell to supply it with the programming current. When the programming of the memory cells is accomplished the drain current of the memory cell is reduced to be below that of the current of the reference branch of the current mirror. Because the memory cell is connected in series with the output branch of the current mirror, the current of the output branch is also reduced to be below the current of the reference branch.
REFERENCES:
patent: 5313429 (1994-05-01), Chevallier et al.
P.E. Allen, "CMOS Analog Circuit Design", Holt, Rinehart and Winston, Inc., 1987, pp. 227-251.
J.F. Dickson, "On-Chip High-Voltage Generation in MNOS Integrated Circuit Using an Improved Voltage Multiplier Tachnique", IEEE JSSC, vol. SC-11, No. 3, Jun. 1976, pp. 374-378.
P. Bradshaw et al., "Principles and applications of the ICL 7660 CMOS Voltage Converter", Intersil, Inc., Application Note A051, 1981.
S. Singer, "Inductance-Less Up dc-dc Convertor", IEEE JSSC, vol. SC-17, No. 4, Aug., 1982, p. 778-781.
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