Memory cell

Details Memory cell Memory cell

1998-06-26

2000-04-25

Nelms, David

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 365190, G11C 1100

Patent

active

060551771

ABSTRACT:
A circuit that may be used as a memory cell that may be capable of a differential write and a single ended read. The circuit generally comprises a memory storage element having a write bitline, a complement write bitline and a read bitline. One or more first gates may be configured to pass data on the write bitline and the inverted write bitline during a write operation. The write operation may occur in response to a write control signal. A second gate may be configured to pass data on from the storage element to the read bitline in response to read control signal. As a result, the circuit may be written by both the write bitline and the complement write bitline and may be read by the read bitline.

REFERENCES:
patent: 4447894 (1984-05-01), Imamura
patent: 4667310 (1987-05-01), Takada
patent: 5216636 (1993-06-01), Runaldue
patent: 5424995 (1995-06-01), Miyazaki et al.
patent: 5742557 (1998-04-01), Gibbins et al.
patent: 5765214 (1998-06-01), Sywyk
patent: 5793669 (1998-08-01), Sheffield et al.
patent: 5802003 (1998-09-01), Iadanza et al.

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