Memory cell

Static information storage and retrieval – Systems using particular element – Flip-flop

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365156, G11C 1100

Patent

active

058318968

ABSTRACT:
A five transistor memory cell, is a single ended static random access memory (SRAM) cell. Reading and writing from the cell is implemented with one bit line along with word line read and word line write signals. One of the transistors within the memory cell is not coupled directly to ground, but is instead coupled to a controlled impedance node. This permits the affected transistor to float between ground and a high impedance state, which permits one bit line to write into the memory cell.

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