Memory card, semiconductor device, and method of controlling...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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C711S103000, C711S203000

Reexamination Certificate

active

11018808

ABSTRACT:
A semiconductor device includes a controller which operates if a request is made that data be written in a certain area in a first block in a semiconductor memory having a predetermined erase block size in which data has already been written, to write the data requested to be written, in a leading area in a second block from which data has already been erased, regardless of a value of an address of the certain area.

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patent: 6145051 (2000-11-01), Estakhri et al.
patent: 2002-133877 (2002-05-01), None
patent: 2003-0070119 (2003-08-01), None
Imamiya et al., “A 130mm2, 256-Mbit NAND Flash with Shallow Trench Isolation Technology”, IEEE Journal of Solid-State Circuits, Nov. 1999, vol. 34, Iss. 11, pp. 1536-1543.
Ichige et al., “A Novel Self-Aligned Shallow Trench Isolation Cell for 90 nm 4 Gbit NAND Flash EEPROMs”, 2003 Symposium on VLSI Technology Digets of Technical Papers, Jun. 2003, IEEE, pp. 89-90.
U.S. Appl. No. 11/205,125, filed Aug. 17, 2005, Oshima.
U.S. Appl. No. 11/085,530, filed Mar. 22, 2005, Oshima.

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