Memory card conforming to a multiple operation standards

Details Memory card conforming to a multiple operation standards Memory card conforming to a multiple operation standards

2008-05-06

2008-05-06

Sparks, Donald (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C713S600000, C365S233100

Reexamination Certificate

active

07370168

ABSTRACT:
The invention intends to provide a memory card conforming to an HS-MMC mode in a standard of a multimedia card, while securing compatibility of both standards of the multimedia card and an SD card. In a normal MMC mode, the data is outputted at a fall edge of a clock signal. A frequency of the clock signal is about 20 MHz. When the data is outputted at the fall edge of the clock signal, data output is in time for a next clock signal. When a parameter ‘1’ is set to a timing register provided in a host interface, the memory card is transitioned into the HS-MMC mode. In the HS-MMC mode, a clock signal frequency is increased to about 52 MHz. Here, the data is outputted at the rise edge of the clock signal, whereby the data output is brought in time for the rise edge of the next clock signal.

REFERENCES:
patent: 6407940 (2002-06-01), Aizawa
patent: 2002/0145935 (2002-10-01), Yagishita
patent: 2003/0151070 (2003-08-01), Natori

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