Memory card apparatus including a link table for managing the co

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

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711156, 39518213, 395559, G06F 1216

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active

057459126

ABSTRACT:
A memory card apparatus has an EEPROM as a semiconductor memory. Each time data is written in the EEPROM, link data representing a recording location of the data is written and managed in a link table. The link table has a flag region with a flag which is set when data write in the EEPROM is requested and is reset when the link data has completely been written in the link table. In case of card removal during operation or power failure, the flag set in the flag region of the link table is not reset and remains. Thus, by checking the flag area of the link table, the occurrence of card removal during operation or power failure can be detected, and various countermeasures can be conducted. Thus, the correspondency between the recorded contents in the EEPROM and the contents in the link table can be maintained as much as possible.

REFERENCES:
patent: 4752678 (1988-06-01), Rikuna
patent: 4877945 (1989-10-01), Fujisaki
patent: 4887234 (1989-12-01), Iijima
patent: 5293236 (1994-03-01), Adachi et al.
patent: 5307470 (1994-04-01), Kataoka et al.
patent: 5341493 (1994-08-01), Yanai et al.
Patent Abstracts of Japan, Vo. 13, No. 12 (P-812) 12 Jan. 1989 & JP-A-63 219 045 (Hitachi Ltd) 12 Sep. 1988.

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