Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
1999-03-30
2002-07-09
Dharia, Rupal (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S062000, C710S108000
Reexamination Certificate
active
06418501
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to memory cards which realize two interface standards such as a PCMCIA interface standard and an IDE interface standard, and more particularly to a memory card which accurately realizes the two interface standards.
The PCMCIA interface standard is provided as an interface standard for IC memory cards and input/output (I/O) cards. On the other hand, the IDE interface standard is provided as an interface standard for hard disks.
Recently, as an example of a method of using the memory card which is mounted with a memory such as a flash memory, it is known to set the memory card on a digital camera and to store images picked up by the digital camera into the memory card. The memory card which stores the images is inserted into and set in a PCMCIA sized slot of a personal computer, and the stored images are edited or processed in the personal computer. Accordingly, the memory card which is used in this manner must satisfy the PCMCIA interface standard so as to enable the memory card to be set and used on the personal computer, and the IDE interface standard so as to enable the memory card to be set and used on the digital camera. When realizing such two interface standards, it is important that the interface standards are realized accurately.
2. Description of the Related Art
The PCMCIA interface standard and the IDE interface standard are both an interface standard having a 68-pin structure.
But a 56th pin in particular introduces a problem when realizing these two interface standards on the same memory card.
According to the PCMCIA interface standard, the 56th pin is defined as a pin for an address
25
. On the other hand, the 56th pin is defined as a pin for a CSEL signal according to the IDE interface standard.
According to the IDE interface standard, the CSEL signal is used as a signal for notifying from a host unit to a drive whether the drive is to be operated as a 0-system drive or a 1-system drive.
More particularly, when employing a construction in which a 56th pin of a drive
502
is connected to a power supply (for example, 5 V) via a pull-up resistor R as shown in
FIGS. 1A and 1B
, a host unit
501
notifies the drive
502
that the drive
502
is to be operated as a 0-system drive by outputting a grounded CSEL signal from a 56th pin of the host unit
501
as shown in FIG.
1
A. On the other hand, the host unit
501
notifies the drive
502
that the drive
502
is to be operated as a 1-system drive by outputting an open-circuited CSEL signal from the 56th pin of the host unit
501
as shown in FIG.
1
B.
Accordingly, when the memory card is used under the PCMCIA interface standard, it is necessary to connect to the 56th pin, which is defined as the pin for the address
25
, a pull-up resistor R which is connected to the power supply as shown in FIG.
2
.
Even if the pull-up resistor R is connected to the 56th pin which is defined as the pin for the address
25
when using the memory card under the PCMCIA interface standard, the address data transferred to the address
25
should not be affected in principle.
However, the fact that the pull-up resistor R is connected to the 56th pin which is defined as the pin for the address
25
is not desirable, because the PCMCIA interface standard is not accurately realized by such an arrangement.
Furthermore, when the pull-up resistor R is connected as described above, there is a possibility that a bit of the address data transferred to the address
25
will become distorted and inverted. This bit inversion causes more serious problems than the fact that the PCMCIA interface standard is not accurately realized.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a novel and useful memory card in which the problems described above are eliminated.
Another and more specific object of the present invention is to provide a memory card which can accurately realize two interface standards when employing a construction for realizing two interface standards such as the PCMCIA interface standard and the IDE interface standard.
Still another object of the present invention is to provide a memory card which realizes two interface standards, comprising an input terminal receiving a grounded or open-circuited signal from a host unit when using the memory card in conformance with a first interface standard, and receiving a binary signal from the host unit when using the memory card in conformance with a second interface standard, a first circuit acquiring standard information which indicates the first or second interface standard, from a signal issued from the host unit, a second circuit outputting a high-level voltage when using the memory card in conformance with the first interface standard and outputting a high-impedance signal when using the memory card in conformance with the second interface standard, depending on the standard information acquired by the first circuit, and a resistor coupling an output of the second circuit and the input terminal. According to the memory card of the present invention, it is possible to accurately realize two interface standards. Further, since it is possible to provide a memory card which is in conformance with the two interface standards, it is possible to realize accurate data write and data read with respect to a memory of the memory card.
A further object of the present invention is to provide a memory card comprising an input terminal receiving a grounded or open-circuited signal when using the memory card in conformance with a first interface standard, and receiving a binary signal when using the memory card in conformance with a second interface standard, a first circuit acquiring standard information which indicates the first or second interface standard, from an external signal, a second circuit having an output terminal which outputs a high-level signal when using the memory card in conformance with the first interface standard and outputs a high-impedance signal when using the memory card in conformance with the second interface standard, depending on the standard information acquired by the first circuit, and a resistor coupling the output of the second circuit and the input terminal. According to the memory card of the present invention, it is possible to accurately realize two interface standards. Further, since it is possible to provide a memory card which is in conformance with the two interface standards, it is possible to realize accurate data write and data read with respect to a memory of the memory card.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5579487 (1996-11-01), Meyerson et al.
patent: 5941963 (1999-08-01), Charles et al.
patent: 6292863 (2001-09-01), Terasaki et al.
Gama Shinkichi
Hayashi Tomohiro
Nagase Takeshi
Okumura Yoshiki
Takamatsuya Yoshihiro
Arent Fox Kintner & Plotkin & Kahn, PLLC
Dharia Rupal
Fujitsu Limited
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