Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2008-04-01
2008-04-01
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C365S222000, C365S228000
Reexamination Certificate
active
10674981
ABSTRACT:
Apparatus and method to carry out refresh operations on rows of memory cells within a memory device independently of a memory controller during times when there is no activity on a memory bus coupling the memory device to the memory controller that involves the memory device.
REFERENCES:
patent: 5689677 (1997-11-01), MacMillan
patent: 5859809 (1999-01-01), Kim
patent: 6400631 (2002-06-01), Williams et al.
patent: 6925086 (2005-08-01), Curtis et al.
patent: 2001/0008496 (2001-07-01), Leung
patent: WO 99/30240 (1999-06-01), None
Notification Of Transmittal Of The International Search Report And The Written Opinion Of The International Searching Authority, Or The Declaration for PCT/US2004/032039, mailed Mar. 16, 2005, 2 pages.
Bains Kuljit S.
Ellis Robert M.
Freeman Chris B.
Halbert John B.
Khandekar Narendra S.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Peikari B. James
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