Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1998-08-20
1999-09-14
Le, Vu A.
Static information storage and retrieval
Read/write circuit
Bad bit
36523003, G11C 1140
Patent
active
059532688
ABSTRACT:
A semiconductor memory which is capable of enhancing its memory utilization efficiency and suppressing an increase in the memory area is provided. The semiconductor memory is equipped with a plurality of main memory blocks and a single redundancy memory block. A test ROM having a test program stored therein is stored in a portion of the redundancy memory block. If a defective memory cell is present in one of the main memory blocks, control means replaces this main memory block with the redundancy memory block. The test ROM is moved to an area within the main memory block in which the defective memory cell is not present.
REFERENCES:
patent: 4760575 (1988-07-01), Watanabe
patent: 5483491 (1996-01-01), Yoshioka et al.
patent: 5576633 (1996-11-01), Roundtree et al.
patent: 5576999 (1996-11-01), Kim et al.
Le Vu A.
NEC Corporation
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