Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-09-05
2010-06-01
Baderman, Scott T (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
07730353
ABSTRACT:
A system and method are disclosed for generating triggers within a hardware emulator. The system allows for dynamic reconfiguration of the trigger generation scheme during emulation. In one aspect, input probe signals are received on an address port to a memory from an integrated circuit within the emulator. The memory outputs from a data port, data, which is addressed, at least in part, by the input probe signals. The data output from the data port may be sent through further combinatorial logic or directly connected to a logic analyzer and represents trigger information. In another aspect, the trigger generation scheme may be reconfigured dynamically during emulation. For example, where the memory is a dual-port RAM, an emulation host can write to the memory to perform the reconfiguration.
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Brunot Gregoire
Selvidge Charles
Baderman Scott T
Klarquist & Sparkman, LLP
Leibovich Yair
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