Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2005-06-14
2010-10-12
Thai, Tuan V (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S141000, C711S142000, C711S143000, C711S144000, C711S145000, C711S146000, C711S200000, C711S203000, C711S205000, C711S206000, C711S207000
Reexamination Certificate
active
07814292
ABSTRACT:
A technique to speculatively assign a memory attribute. More specifically, embodiments of the invention include an architecture to assign and issue a speculative memory attribute based on a plurality of translation look-aside buffer (TLB) page attributes concurrently with the determination of the correct memory attribute, such that, in at least one case, determination of the correct memory attribute does not impact performance of a system in which at least one embodiment of the invention is included.
REFERENCES:
patent: 6006312 (1999-12-01), Kohn et al.
patent: 6119205 (2000-09-01), Wicki et al.
patent: 6430657 (2002-08-01), Mittal et al.
patent: 6651156 (2003-11-01), Courtright et al.
patent: 6826670 (2004-11-01), Middleton et al.
patent: 7062631 (2006-06-01), Klaiber et al.
patent: 7089397 (2006-08-01), Anvin et al.
patent: 2003/0018877 (2003-01-01), Gaskins et al.
patent: 2003/0167292 (2003-09-01), Ross
Intel Corporation
Li Zhuo H
Thai Tuan V
Trop Pruner & Hu P.C.
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