Memory attribute speculation

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Details

C711S141000, C711S142000, C711S143000, C711S144000, C711S145000, C711S146000, C711S200000, C711S203000, C711S205000, C711S206000, C711S207000

Reexamination Certificate

active

07814292

ABSTRACT:
A technique to speculatively assign a memory attribute. More specifically, embodiments of the invention include an architecture to assign and issue a speculative memory attribute based on a plurality of translation look-aside buffer (TLB) page attributes concurrently with the determination of the correct memory attribute, such that, in at least one case, determination of the correct memory attribute does not impact performance of a system in which at least one embodiment of the invention is included.

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patent: 7089397 (2006-08-01), Anvin et al.
patent: 2003/0018877 (2003-01-01), Gaskins et al.
patent: 2003/0167292 (2003-09-01), Ross

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