Memory array with multiple read ports

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

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Details

C365S154000, C365S189020

Reexamination Certificate

active

07092310

ABSTRACT:
A multiport array comprises a read section which is separated from an array of memory cells and which forms a plurality of data-out ports each consisting of a predetermined number of output lines. The read section comprises a multiplex network containing a plurality of multiplex arrays each associated with one of the data-out ports (0,1, . . . ,15). The multiplex arrays are connected to the data read lines of the memory cells and are selected by read addresses. The multiplex arrays comprise transmission elements which connect selected ones of the data read lines to the associated data-out port.

REFERENCES:
patent: 3975623 (1976-08-01), Weinberger
patent: 5590087 (1996-12-01), Chung et al.
patent: 5754468 (1998-05-01), Hobson
patent: 6535963 (2003-03-01), Rivers
patent: 0591752 (1993-09-01), None

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