Memory array tester information processing system

Details Memory array tester information processing system Memory array tester information processing system

2005-10-18

2008-10-28

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S218000, C365S189011

Reexamination Certificate

active

07443746

ABSTRACT:
A memory array tester information processing system includes executing a generation block to gather drain currents and gate voltages information for a memory array, utilizing an extraction block to obtain the drain currents and the gate voltages a portion of the memory array and an entire memory array from the generation block or stored information, and executing an analysis block to operate on the drain currents and the gate voltages from the extraction block to correlate operations on the portion of the memory array and the entire memory array. The system includes utilizing a presentation block to format the information used in the analysis block and the results of the analysis block to compute a peak threshold voltage for the memory array.

REFERENCES:
patent: 6560568 (2003-05-01), Singhal et al.
patent: 6815231 (2004-11-01), Miura et al.
patent: 6819596 (2004-11-01), Ikehashi et al.
patent: 6914817 (2005-07-01), Harari
patent: 6917542 (2005-07-01), Chen et al.
patent: 7184336 (2007-02-01), Chiang et al.

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