Memory array operating as a shift register

Details Memory array operating as a shift register Memory array operating as a shift register

2006-05-23

2006-05-23

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S104000, C711S105000, C711S111000, C711S154000, C711S170000, C711S173000, C365S189120, C365S221000

Reexamination Certificate

active

07051153

ABSTRACT:
A memory array configured to operate as a shift register includes a first column of memory cells with an input and an output and at least a second column of memory cells with an input and an output. The memory array also includes a multiplexer that is connected between the output of the first column of memory cells and the input of the second column of memory cells. The memory array can be operated as a shift register by shifting data from the first column of memory cells to the second column of memory cells through the multiplexer rather than using general routing lines.

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