Memory array having a digit line buried in an isolation region a

Details Memory array having a digit line buried in an isolation region a Memory array having a digit line buried in an isolation region a

1997-04-25

1999-04-06

Hoang, Huan

Static information storage and retrieval

Systems using particular element

Capacitors

365182, 257905, G11C 1124

Patent

active

058927077

ABSTRACT:
A memory array includes a semiconductor substrate, an isolation trench disposed in the substrate, and a conductor that is disposed in the trench. The array also includes a memory cell that is coupled to the conductor in the trench. The conductor may be a digit line that is coupled to a source/drain region of the memory cell or to a shared source/drain region of a pair of adjacent memory cells.

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