Memory array having 2T memory cells

Details Memory array having 2T memory cells Memory array having 2T memory cells

2006-05-02

2006-05-02

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Semiconductive

C365S063000

Reexamination Certificate

active

07038943

ABSTRACT:
The present invention relates to a memory array having a plurality of memory cells. In order to combine the compactness of DRAM with the speed and uncomplicated processing profits of SRAM the present invention proposes a memory array having a plurality of memory cells each comprising:—a storage transistor having a drain coupled to a word-line of said array, a source coupled to a bit-line of said array and a gate, and—a control transistor having a drain coupled to the gate of said storage transistor, a source coupled to said bit-line and a gate coupled to said word-line.

REFERENCES:
patent: 6680864 (2004-01-01), Noble
patent: 6804142 (2004-10-01), Forbes

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