Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2007-10-09
2007-10-09
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C326S039000
Reexamination Certificate
active
11019484
ABSTRACT:
Memory apparatus for a message processing system and method of providing the same is described. In one example, a message processing system (200) includes a set of n processing elements (202) for processing messages, where n is an integer greater than zero. A set of m memories (204) is provided for storing the messages, where m is an integer greater than zero. Multiplexing logic (206) is provided for coupling each of the processing elements to each of the memories. Control logic (208) is provided for driving the multiplexing logic to provide access to each of the memories among the processing elements in accordance with a gated module-n schedule.
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Brebner Gordon J.
Kulkarni Chidamber R.
Bragdon Reginald
Brush Robert
Hardaway Michael R.
Mackall Larry T
Xilinx , Inc.
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