Memory apparatus, and method of averagely using blocks of a...

Details Memory apparatus, and method of averagely using blocks of a... Memory apparatus, and method of averagely using blocks of a...

2011-03-15

2011-03-15

Choe, Yong (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

C711S103000, C711S154000, C711SE12001

Reexamination Certificate

active

07908423

ABSTRACT:
A flash memory controller for averagely using blocks of a flash memory and the method thereof are provided. The flash memory controller is configured to process wear-leveling by allocating frequently updated data in less-erased blocks, and, allocating less-updated data in frequently erased blocks to achieve dynamic uniformity of times of erasion of blocks.

REFERENCES:
patent: 6081447 (2000-06-01), Lofgren et al.
patent: 6230233 (2001-05-01), Lofgren et al.
patent: 6587915 (2003-07-01), Kim
patent: 6594183 (2003-07-01), Lofgren et al.
patent: 6742078 (2004-05-01), Chien et al.
patent: 6850443 (2005-02-01), Lofgren et al.
patent: 2003/0227804 (2003-12-01), Lofgren et al.
patent: 2005/0114589 (2005-05-01), Lofgren et al.
Chinese Office Action dated Jan. 29, 2010 issued in related Chinese Patent Application No. 2008101273744.

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