Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1997-02-06
1999-11-16
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711205, 39580034, 395555, G06F 1200
Patent
active
059875739
ABSTRACT:
An empty block table is constructed by 64 words.times.8 bits and has 512 memory positions 000H(A0) to IFFH(A511) one-to-one corresponding to 512 blocks BL0 to BL511 within a flash memory FMi. Empty data [a] of 1 bit is stored to each memory position (Aj). This empty data has value "1" when a block BLj corresponding to this memory position (Aj) is in an empty state at present. The empty data also has value "0" when no block BLj corresponding to this memory position (Aj) is in the empty state at present (when data are included in this block).
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Cabeca John W.
Namazi Mehdi
Tokyo Electron Limited
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