Memory allocation technique for maintaining an even distribution

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories

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707100, 707205, G06F 1730

Patent

active

060165294

ABSTRACT:
In a computer system, a data structure is provided in memory for storing one or more data files from an external device. The data files stored in the data structure are accessible by a number of processes executing in the computer system. The computer system includes a storage device such as a cache for storing data from a subset of pages of the memory. Each of the pages of the cache is referred to as a cache page, having an associated cache page address. A physical address is allocated for storing each page of a retrieved data file stored in the data structure such that a cache page address portion of the physical address is selected from the available cache page addresses. The physical address is further selected such that the cache page addresses are substantially evenly distributed amongst the pages of the retrieved data file and the data structure in order to minimize thrashing in the cache and enhance performance.

REFERENCES:
patent: 4926322 (1990-05-01), Stimac
patent: 5485609 (1996-01-01), Vitter et al.
patent: 5630097 (1997-05-01), Orbits et al.
patent: 5752255 (1998-05-01), Jarvis

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