Memory administrating method

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring

Reexamination Certificate

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Details

C711S153000, C711S156000, C345S543000, C345S544000, C707S793000

Reexamination Certificate

active

07613895

ABSTRACT:
A memory administrating method of administrating a memory divided into plural regions each of which consists of consecutive memory addresses, where the method includes the steps of: providing each region of the plural regions with usage information; and when releasing a release target region currently in use, determining usage of the release target region based on the usage information of at least one of neighboring regions positioned before and after the release target region.

REFERENCES:
patent: 6195389 (2001-02-01), Rodriguez et al.
patent: 6711298 (2004-03-01), Amonou
patent: 7100009 (2006-08-01), Schopp
patent: 2005/0066143 (2005-03-01), Schopp
patent: 04-112249 (1992-04-01), None
patent: 5-12099 (1993-01-01), None
patent: 06-309197 (1994-11-01), None
Japanese Office Action dated Jan. 31, 2008.

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