Memory addressing

Details Memory addressing Memory addressing

2008-07-15

2008-07-15

Ellis, Kevin (Department: 2188)

Electrical computers and digital processing systems: memory

Address formation

Operand address generation

C711S002000, C711S212000, C711S201000, C711S219000

Reexamination Certificate

active

11227423

ABSTRACT:
Addressing memory includes receiving a first operand to a memory addressing operator, receiving a second operand to the memory addressing operator, performing sign extension on the first operand to provide a sign-extended operand, shifting the sign-extended operand to provide a shifted, sign-extended operand, and adding the shifted, sign-extended operand to the second operand. The second operand has a different bit length than the first operand.

REFERENCES:
patent: 5680568 (1997-10-01), Sakamura
patent: 6014723 (2000-01-01), Tremblay et al.
patent: 6189086 (2001-02-01), Yamaura
patent: 6408383 (2002-06-01), Tremblay et al.
patent: 6542990 (2003-04-01), Tremblay et al.
patent: 6892295 (2005-05-01), Saulsbury
patent: 2004/0003209 (2004-01-01), Mitsuishi et al.

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