Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1996-09-30
1999-06-01
Swann, Tod R.
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711202, 711170, 711 6, 711171, G06F 1300
Patent
active
059097027
ABSTRACT:
A multiprocessor data processing system includes a private data bus and a private program bus coupled to each of the processors. Coupled between the private data buses is a plurality of memory banks, each of which can be dynamically switched between the processors to move blocks of data without physically transferring the data from one bank to another. Likewise, a plurality of memory banks is coupled between the program buses. These memory banks are loaded with pages of program instructions from external memory over a shared bus. Any one of the pages can be coupled to either of the processors on its respective private program bus. When the pages are coupled to the shared bus, they appear as a contiguous address space. When a page is coupled to one of the private program buses, the addressing mode is changed so that the page is mapped to a common address space. This permits the program code to be loaded into any available page, and the processors can execute the code regardless of where it has been loaded, thereby permitting easy relocatability.
REFERENCES:
patent: 4487873 (1984-12-01), Price et al.
patent: 4616310 (1986-10-01), Dill et al.
patent: 4814970 (1989-03-01), Barbagelata et al.
patent: 4860252 (1989-08-01), Sykora
patent: 5010476 (1991-04-01), Davis
patent: 5333269 (1994-07-01), Calvignac et al.
patent: 5379388 (1995-01-01), Asghar
patent: 5423008 (1995-06-01), Young et al.
patent: 5521880 (1996-05-01), McClure
patent: 5539896 (1996-07-01), Lisle
patent: 5572695 (1996-11-01), Andrews et al.
patent: 5611075 (1997-03-01), Garde
patent: 5630153 (1997-05-01), Intrater et al.
patent: 5685005 (1997-11-01), Garde et al.
patent: 5696913 (1997-12-01), Grove et al.
patent: 5737760 (1998-04-01), Grimmer, Jr et al.
Jalfon Marc
Regenold David
Ricci Franco
Satagopan Ramprasad
Bataille Pierre Michel
Intel Corporation
Swann Tod R.
LandOfFree
Memory address translations for programs code execution/relocati does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory address translations for programs code execution/relocati, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory address translations for programs code execution/relocati will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-962714