Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate
2007-10-02
2008-12-16
Luu, Pho M. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
C365S049100, C365S201000, C365S230060
Reexamination Certificate
active
07466603
ABSTRACT:
A configurable memory system and method is wherein an integrated circuit coupled to a memory device includes application logic and memory interface logic in communication with the application logic, the memory interface logic configured to access a memory array within the memory device. The memory interface logic provides logic functions and/or signals that would have been provided by logic on a prior art memory device. The interface logic may access the memory device synchronously or asynchronously. The integrated circuit may communicate to the memory device using multiplexed or non-multiplexed signals.
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Carr & Ferrell LLP
Inapac Technology, Inc.
Luu Pho M.
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