Memory accessible in read mode only

Details Memory accessible in read mode only Memory accessible in read mode only

1997-07-22

1999-01-19

Nelms, David

Static information storage and retrieval

Read/write circuit

Differential sensing

365208, 365104, G11C 702

Patent

active

058620915

ABSTRACT:
A memory accessible in read mode only comprises storage elements designed to contain a bit that can assume two levels. Each memory cell comprises a transistor. The transistor of the storage element may include an associated circuit portion to prompt a short circuit between the drain and the source of the transistor if the storage element has to contain one bit at one of the two levels. Furthermore, the use of an unbalanced differential amplifier permits an improvement of the access time of the memory.

REFERENCES:
patent: 4404654 (1983-09-01), Kamuro et al.
patent: 4644197 (1987-02-01), Flannagan
patent: 4646265 (1987-02-01), Takamizawa et al.
patent: 4648074 (1987-03-01), Pollacheck
patent: 5060190 (1991-10-01), Chen et al.
patent: 5515327 (1996-05-01), Matsukawa et al.
Patent Abstracts of Japan, vol. 009, No. 118 (E-136), May 23, 1985, JP 60009157.
IBM Technical Disclosure Bulletin, vol. 26, No. 10a, Mar. 1984, pp. 5252-5255.

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