Memory access using multiple sets of address/data lines

Details Memory access using multiple sets of address/data lines Memory access using multiple sets of address/data lines

2007-09-04

2007-09-04

Song, Jasmine (Department: 2188)

Electrical computers and digital processing systems: memory

Address formation

C711S212000, C711S220000, C710S004000, C710S014000, C710S026000

Reexamination Certificate

active

10987812

ABSTRACT:
Methods and apparatus for accessing multiple memory arrays within a memory device using multiple sets of address/data lines are provided. The memory arrays may be accessed independently, using separate addresses, in one mode of operation, and accessed using a common single address in another mode of operation.

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patent: WO 01/42929 (2001-06-01), None
PCT International Search Report and Written Opinion dated Mar. 10, 2006.

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