Memory access strobe configuration system and process

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S236000

Reexamination Certificate

active

08009491

ABSTRACT:
A memory access strobe configuration system and process operable to generate a strobe signal having a selected phase. Based on the strobe signal, a write/read cycle using a first logic value at a memory location of a memory device generates a result logic value. The result logic value provided by the write/read cycle is compared to the first logic value. Where there is a mismatch between the result logic value and the first logic value, the phase of the strobe signal is updated. The process is then repeated using a strobe signal having the updated phase.

REFERENCES:
patent: 2007/0096762 (2007-05-01), Yamane et al.
patent: 2007/0217559 (2007-09-01), Stott et al.

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