Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2005-12-09
2008-09-16
Sough, Hyung (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S150000, C711S151000, C711S167000, C711S168000, C710S036000, C710S039000, C710S040000, C710S124000
Reexamination Certificate
active
07426621
ABSTRACT:
A method includes receiving a first memory access request from a first device during a first interval. The first memory access request is to access a first page of a multiple-page memory. The method further includes receiving a second memory access request from the first device during a second interval subsequent to the first interval and receiving a third memory access request from a second device during the second interval. The method additionally includes preferentially selecting the second memory access request over the third memory access request for provision to the multiple-page memory if an indicator indicates the second memory access request is expected to access the first page of the multiple-page memory.
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Kommrusch Steven J.
Tischler Brett A.
Advanced Micro Devices , Inc.
Patel Kaushikkumar
Sough Hyung
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