Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1995-01-04
1999-04-27
Donaghue, Larry D.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
39580014, 39520031, 39520044, 39520046, 711147, 711148, 711153, G06F 1516
Patent
active
058988831
ABSTRACT:
To increase the capacity of usable memory of a parallel processing computer system as a whole and effectively utilize the address space without waste, a variable-length Global/Local allocation field is provided in a fixed-length address. When the field is locally set, the address is used as an address of a local memory area to which the local processor refers. When the allocation is globally set, the remaining address is a variable length logical processor number (this number is converted into a physical processor number) and a variable length offset address, for specifying a global memory area belonging to a processor out of the global areas of memories of a group of some of the processors, which global memory can be referred to by all the processors of the groups. A memory access interface executes memory access to the local or global area of the memory of the local processor or to the global area of the memory of another processor.
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Fujii Hiroaki
Sukegawa Naonobu
Tarui Toshiaki
Donaghue Larry D.
Follansbee John
Hitachi , Ltd.
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