Memory access management in a shared memory multi-processor...

Details Memory access management in a shared memory multi-processor... Memory access management in a shared memory multi-processor...

2007-02-06

2007-02-06

Padmanabhan, Mano (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S151000

Reexamination Certificate

active

10687196

ABSTRACT:
In one embodiment, an apparatus includes a requester node to transmit a request for data in a memory. The apparatus also includes a service node that includes the memory. The service node receives the request for the data, wherein the service node is to set a congestion flag in response to the request sent back to the requester node upon determining that access to the data is congested. The requester node is to freeze priority updates for the data upon receipt of the congestion flag.

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patent: 6401212 (2002-06-01), Bondi et al.
patent: 6557084 (2003-04-01), Freerksen et al.
patent: 6938131 (2005-08-01), Ogasawara
patent: 2003/0072260 (2003-04-01), Janoska et al.
patent: 2006/0059319 (2006-03-01), Frenzel et al.

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