Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-01-31
2006-01-31
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S204000, C711S205000, C711S118000
Reexamination Certificate
active
06993638
ABSTRACT:
If a base register value, an index register value and a displacement value are given in the case of operand access, these values are inputted to an arithmetic unit to generate a correctly calculated logical address. Simultaneously, a logical address predicting unit predicts a logical address. An absolute address is predicted based on the predicted logical address by using an absolute address history table. Access to a cache memory (LBS) based on an absolute address is made using the predicted absolute address to obtain cache data. Then, the arithmetic unit calculates a correct absolute address using the correctly calculated address using a TLB and checks if the correct absolute address coincides with the predicted absolute address so as to perform result confirmation of the cache data read from the LBS. In the case of instruction fetch, similar processing is carried out except that the calculation of a logical address is not performed.
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Inoue Aiichiro
Ukai Masaki
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