Memory access control

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

Reexamination Certificate

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Details

C711S168000, C711S153000, C711S156000

Reexamination Certificate

active

06973550

ABSTRACT:
In general, in one aspect, the disclosure describes storing identification of one or more memory buckets associated with different, respective, queued write commands, and, based on the stored identification, determining whether at least one bucket associated with a read command is included in one or more buckets associated with at least one queued write command.

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QDR, Next-Genration Network SRAM, May 14, 2001, pp. 1-20.
INTEL, Intel IXP 1200 Network Processor Family, Hareware Reference Manual, Aug. 2001, pp. 1-272.

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