Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2008-05-20
2008-05-20
An, Meng-Al T. (Department: 2195)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C712S214000, C718S104000
Reexamination Certificate
active
07376954
ABSTRACT:
A mechanism for assuring quality of service for a context in a digital processor has a first scheduling register dedicated to the context, the register having N out of M bits set, and a first scheduler that consults the register to assign issue slots to the context. The first scheduler grants issue slots for the context by referencing the N bits in the first register, and repeats a pattern of assignments of issue slots after referencing the M bits of the first register.
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An Meng-Al T.
Boys Donald R.
Huffman James W.
MIPS Technologies Inc.
Wai Eric C
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