Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-01-09
2007-01-09
Elmore, Stephen C. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S100000, C711S154000, C711S165000, C710S068000
Reexamination Certificate
active
10747474
ABSTRACT:
According to one embodiment a computer system is disclosed. The computer system includes a central processing unit (CPU), a cache memory coupled to the CPU and a cache controller coupled to the cache memory. The cache memory includes a plurality of compressible cache lines to store additional data. The cache controller includes compression logic to compress one or more of the plurality of cache lines into compressed cache lines, and hint logic to store hint information in unused space within the compressed cache lines.
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Adl-Tabatabai Ali-Reza
Ghuloum Anwar M.
Blakely , Sokoloff, Taylor & Zafman LLP
Elmore Stephen C.
Intel Corporation
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