Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate
2002-12-19
2004-12-14
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
C710S033000, C710S058000, C709S241000, C709S205000
Reexamination Certificate
active
06832268
ABSTRACT:
BACKGROUND
1. Technical Field
Embodiments of this invention relate generally to preventing starvation problems for incoming coherent Input/Output (I/O) transactions, and more specifically, to preventing starvation for incoming coherent I/O transactions against coherent processor-issued transactions when both transactions are attempting to access the same memory address.
2. Discussion of the Related Art
Coherent transactions may attempt to access a physical memory space. Coherent transactions access the physical memory space by requesting a read or write command to a specific memory address. A subset of coherent transactions, such as processor-issued transactions may be incoming that request the use of a specific memory address. Additionally, input/output (I/O) device issued coherent transactions may request the use of a specific memory address. For simplicity, the I/O device issued coherent transactions may be referred to as coherent I/O issued transactions. If the processor issued transactions request the same specific memory address as the coherent I/O issued transactions, a conflict arises. When the conflict arises, the coherent I/O issued transaction with the memory address conflict will not progress to its destination because of the address conflict. This conflict may occur while other non-conflicted coherent I/O transactions and all other processor-issued transactions progress to their destination.
REFERENCES:
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Kulick Stanley S.
Pamujula Rajesh S.
Tan Sin S.
Chen Alan S
Gaffin Jeffrey
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