Mechanism that provides efficient multi-word load atomicity

Details Mechanism that provides efficient multi-word load atomicity Mechanism that provides efficient multi-word load atomicity

2011-01-18

2011-01-18

Choe, Yong (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S156000, C703S026000, C703S027000, C712S022000, C712S024000

Reexamination Certificate

active

07873794

ABSTRACT:
Disclosed is an apparatus, method, and program product that provides atomic, multi-word load support without incurring additional memory utilization. A double-word is atomically loaded without the use of one or more additional fields and without a lock. An invalidity marker is used in connection with a cache miss time to ascertain whether a loaded double-word has been stored and loaded atomically, and is thus, valid.

REFERENCES:
patent: 6360194 (2002-03-01), Egolf
patent: 6728846 (2004-04-01), Noyes
patent: 6922666 (2005-07-01), Noyes
patent: 2004/0163083 (2004-08-01), Wang et al.

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