Mechanism for supporting self-modifying code in a harvard...

Details Mechanism for supporting self-modifying code in a harvard... Mechanism for supporting self-modifying code in a harvard...

2005-03-22

2005-03-22

Auve, Glenn A. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

C712S033000, C712S207000

Reexamination Certificate

active

06871247

ABSTRACT:
For use in a processor having separate instruction and data buses, separate instruction and data memories and separate instruction and data units, a mechanism for, and method of, supporting self-modifying code and a digital signal processor incorporating the mechanism or the method. In one embodiment, the mechanism includes: (1) a crosstie bus coupling the instruction bus and the data unit and (2) a request arbiter, coupled between the instruction and data units, that arbitrates requests therefrom for access to the instruction memory.

REFERENCES:
patent: 5996071 (1999-11-01), White et al.
patent: 6209083 (2001-03-01), Naini et al.
patent: 6516378 (2003-02-01), Yamashita et al.
patent: 20020053005 (2002-05-01), Hori
patent: 20020056030 (2002-05-01), Kelly et al.
patent: 20020059393 (2002-05-01), Reimer et al.

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