Mechanism for resolving ambiguous invalidates in a computer...

Details Mechanism for resolving ambiguous invalidates in a computer... Mechanism for resolving ambiguous invalidates in a computer...

2007-02-06

2007-02-06

Portka, Gary (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S121000

Reexamination Certificate

active

11258586

ABSTRACT:
The invention provides a system and method for resolving ambiguous invalidate messages received by an entity of a computer system. An invalidate message is considered ambiguous when the receiving entity cannot tell whether it applies to a previously victimized memory block or to a memory block that the entity is waiting to receive. When an entity receives such an invalidate message, it stores the message in its miss address file (MAF). When the entity subsequently receives the memory block, the entity “replays” the Invalidate message from its MAF by invalidating the block from its cache and issuing an Acknowledgement (Ack) to the entity that triggered issuance of the Invalidate message command.

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