Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-04-20
2001-02-20
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S714000, C438S719000, C438S734000
Reexamination Certificate
active
06191043
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to the fabrication of semiconductor integrated circuits (ICs). More particularly, the present invention relates to improved methods for etching a silicon layer in a plasma processing chamber to form deep openings having high aspect ratios.
In semiconductor IC fabrication, devices such as component transistors may be formed on a semiconductor wafer or substrate, which is typically made of silicon. Deep openings, which may have aspect ratios higher than 35:1, may be etched in the silicon for the purposes of, by way of example, storage, forming isolated capacitors or in MEM device applications. Openings having etch depths of about 3 &mgr;m to about 10 &mgr;m may be termed as deep openings, whereas openings having etch depths of more than about 10 &mgr;m may be termed as ultra deep openings. These ranges are provided as a guide to explaining the invention, and are not intended to define any limitations to the invention. For example, it is assumed that a method for etching an ultra deep opening would be equally effective for etching a more shallow opening.
To facilitate this discussion,
FIG. 1
shows the steps involved in a prior art method of etching deep openings that utilizes a prior art etching gas chemistry. This prior art method starts at
102
when a substrate is provided in a plasma processing chamber and begins with an initial breakthrough etch using a fluorine chemistry in
104
, which may be, by way of example, CF4. This initial etch phase is followed by preparations for the main etch step, which starts at
106
by providing an SF
6
/O
2
/He etchant gas chemistry and striking a plasma using this gas chemistry in
108
. Then the main etch starts in
110
by using the plasma to etch a deep opening in a silicon layer, for example, a trench having a depth of approximately 5.5 &mgr;m. Once etching of the deep trench is accomplished, the process is complete as shown in
112
.
FIG. 2
illustrates a cross-sectional view of an exemplary deep opening having an etch depth of approximately 5.5 &mgr;m in a silicon layer with a masking layer over it that was etched using the prior art etching method presented in
FIG. 1. A
silicon layer
202
, which has a masking layer
204
disposed over it, is etched to form a deep trench
206
. Masking layer
204
may be a layer of conventional photoresist material, which may be patterned for etching, e.g., through exposure to ultraviolet rays. An etch rate of approximately 1.5 &mgr;m/min is achieved. Deep trench
206
, which was etched using the etching method described in
FIG. 1
, has a number of structural flaws, for example, bowed features
208
in the sidewalls as well as notch-like features
210
, which resulted from undercutting of the hard mask.
Other issues that are not directly illustrated in
FIG. 2
but may be encountered in the etching of deep trenches involve non-vertical etch profiles, low etch rates, inadequate etch depths, RIE lag, low TEOS/Si selectivity, critical dimension bias, and silicon nonuniformity. Some of these problems may not appear or become severe enough to pose difficulties until attempts are made to etch openings having greater etch depths and higher aspect ratios. It should be appreciated by those skilled in the art that the aforementioned issues will arise as rapid improvements in the industry call for the use of even deeper and narrower openings than are commonly used in today's state of the art technology.
In view of the foregoing, there are desired improved techniques of etching deep and narrow openings in a silicon layer while avoiding some or all of the numerous problems described above.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects and according to the purpose of the present invention, a method of etching deep openings in a silicon layer in a plasma etching reactor is disclosed. The method includes the steps of providing a semiconductor substrate including the silicon layer into the plasma etching reactor and flowing a gas chemistry for the main etch that includes an oxygen reactant gas, and a helium gas into the plasma etching reactor. The method further includes striking a plasma using the etchant gas chemistry, and then providing a fluorine-containing additive gas, which may include, by way of example, SF
6
, into the plasma etching reactor subsequent to striking the plasma. The method continues with etching an opening at least partially through the silicon layer using this plasma. In a preferred embodiment, a chlorine-containing chemistry is provided prior to flowing the main etch gas chemistry to etch through a native oxide layer that may be disposed over the silicon layer.
In another embodiment of the present invention, a method of etching ultra deep openings in a silicon layer in a plasma etching reactor is disclosed. The method includes the steps of providing a semiconductor substrate including the silicon layer into the plasma etching reactor and flowing a gas chemistry for the main etch that includes an oxygen reactant gas, a helium gas, and an inert bombardment-enhancing gas into the plasma etching reactor. The method further includes striking a plasma using the etchant gas chemistry, and then providing a fluorine-containing additive gas, which may include, for example, SF
6
, into the plasma etching reactor subsequent to striking the plasma. The method continues with etching an opening at least partially through the silicon layer using this plasma. In a preferred embodiment, argon is selected as the inert bombardment-enhancing gas and a chlorine-containing chemistry is provided prior to flowing the main etch gas chemistry to etch through a native oxide layer that may be disposed over the silicon layer.
Other aspects and advantages of the invention will become apparent from the following detailed description taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.
REFERENCES:
patent: 4702795 (1987-10-01), Douglas
patent: 4726879 (1988-02-01), Bondur et al.
patent: 4992134 (1991-02-01), Gupta et al.
patent: 5047115 (2000-03-01), Charlet et al.
patent: 5296095 (1994-03-01), Nabeshima et al.
patent: 5356515 (1994-10-01), Tahara et al.
patent: 5843226 (1998-12-01), Zhao et al.
patent: 5933748 (1999-08-01), Chou et al.
patent: 6033991 (2000-03-01), Ramkumar et al.
International Searching Authority, European Patent Office, International Search Report dated Jul. 31, 2000, 5 pages.
Beyer Weaver & Thomas LLP
Deo Duy-Vu
Lam Research Corporation
Utech Benjamin L.
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