Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1997-09-30
1999-10-12
Sheikh, Ayaz R.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
710107, 710 60, 713600, G06F 1314, G06F 1300, G06F 104
Patent
active
059648562
ABSTRACT:
In a microprocessor system having a bus clock running at a bus clock rate, a method for reducing an idle interval between a first data transfer and a second data transfer, the method comprising the steps of:
REFERENCES:
patent: 5754825 (1998-05-01), Hausauer et al.
patent: 5802356 (1998-09-01), Gaskins et al.
patent: 5829026 (1998-10-01), Leung et al.
Jayakumar Muthurajan
Prasad Bindi A.
Sampath Dilip K.
Schultz Leonard
Wu William S.
Intel Corporation
Sheikh Ayaz R.
Vo Tim T.
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