Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-06-06
2006-06-06
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07058911
ABSTRACT:
A system for measuring a timing skew between two digital signals may include a clock generator for generating a time measurement clock, and a pulse-to-digital converter for converting the timing skew into an equivalent digital coded value after correcting for internal logic delays. The system may further include a register bank for storing the digital coded values, and a controller for generating control signals and sequences for controlling the operation of the pulse-to-digital converter and the register bank.
REFERENCES:
patent: 4523289 (1985-06-01), Soma et al.
patent: 5231598 (1993-07-01), Vlahos
patent: 5600568 (1997-02-01), Iwakura et al.
patent: 5740067 (1998-04-01), Hathaway
patent: 6469550 (2002-10-01), Kurd
patent: 6750692 (2004-06-01), Jang
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Bowers Brandon
Jorgenson Lisa K.
Siek Vuthe
STMicroelectronics Pvt. Ltd.
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