Maximization of low dielectric constant material between interco

Details Maximization of low dielectric constant material between interco Maximization of low dielectric constant material between interco

1996-11-19

1998-12-29

Martin-Wallace, Valencia

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257374, 257397, 257510, 257518, 257908, H01L 2900

Patent

active

058545034

ABSTRACT:
A structure and method of maximizing the volume of low dielectric constant material between adjacent traces of a conductive interconnect structure. A semiconductor structure includes a semiconductor substrate, a first insulating layer located over the semiconductor substrate, a conductive interconnect layer having a plurality of conductive traces located over the first insulating layer, and a patterned insulating layer located over the patterned interconnect layer. One or more trenches are formed in the upper surface of the first insulating layer. These trenches, which do not extend completely through the first insulating layer, are located between adjacent traces of the interconnect layer. A dielectric material having a low dielectric constant is located in these trenches, and between adjacent traces of the patterned interconnect layer. The trenches advantageously maximize the volume of low dielectric constant material which is located between the traces.

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