Matrix of EPROM memory cells with a tablecloth structure having

Details Matrix of EPROM memory cells with a tablecloth structure having Matrix of EPROM memory cells with a tablecloth structure having

1994-02-04

1995-12-12

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257396, 257900, H01L 2968

Patent

active

054752507

ABSTRACT:
The matrix of EPROM memory cells comprises on a semiconductor substrate lines of source and drain parallel and alternated one to another, floating gate areas interposed in a checkerboard pattern between said source and drain lines and control gate lines parallel to one another and perpendicular to said source and drain lines in a superimposed condition with intermediate dielectric and aligned with respect to said floating gate areas. Field oxide areas are provided for, formed on the substrate between one and the other of said control gate lines and side fins of the floating gate areas and of the control gate lines superimposed over said field oxide areas.

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