Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1999-12-21
2001-08-14
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S159000, C257S032000, C257S059000, C345S092000, C505S191000
Reexamination Certificate
active
06274412
ABSTRACT:
BACKGROUND OF THE INVENTION
Materials have been developed for printing on substrates such as those used for printed wiring boards and flexible circuits. They offer the advantage that electrical conductors consisting of a pure, single-phase metal can be produced by a simple print-and-heat process instead of by the usual multi-step photolithographic etching process. This novel family of compounds, commercially available as PARMOD™ compositions from Parelec, LLC, which are disclosed in Applicants' co-pending U.S. application Ser. No. 09/367,783 filed Aug. 20, 1999, the application in total being hereby incorporated by reference. These compositions can be formulated into printing inks or pastes or toners. These formulations can be printed on a substrate and cured to well-consolidated films of pure metal in seconds. The fast curing capability of PARMOD™ compositions, as well as their ready application, makes it possible to use them to create complex thin metal objects by very simple and low-cost processes.
PARMOD™ mixtures contain a Reactive Organic Medium (ROM) and metal flakes and/or metal powders. The ROM consists of either a Metallo-Organic Decomposition (MOD) compound or an organic reagent, which can form such a compound upon heating in the presence of the metal constituents. The ingredients are blended together with organic vehicles, if necessary, to produce printing inks or pastes or toners for electrostatic printing. PARMOD™ toners and their use in electrostatic printing are disclosed in Applicants' co-pending U.S. application Ser. No. 09/369,571 filed Aug. 6, 1999, the application in total being hereby incorporated by reference. These inks and toners can be printed on a temperature sensitive substrate and cured to well-consolidated, well-bonded electrical conductors at a temperature low enough so that the substrate is not damaged. The curing process occurs in seconds at temperatures as much as 500° C. below those used for conventional sintering of thick film inks and pastes.
PARMOD™ mixtures function by deposition of material from decomposition of the MOD compound which “chemically welds” the powder constituents of the mixture together into a monolithic solid. In the case of metals this results in a porous but continuous metal trace which has a density approximately half that of bulk metal and an electrical conductivity per unit mass which is also approximately half that of bulk metal. This demonstrates that the printed PARMOD™ conductors are made up of continuous well-bonded metal rather than of individual particles that are in adventitious contact with each other.
Similar chemistry is used to produce well-bonded oxide structures as well by incorporating oxide powders of desired properties with the appropriate ROM, as disclosed in Provisional Patent application Ser. No. 60/099,040.
An important class of temperature sensitive substrates is semiconductor, particularly amorphous silicon. Amorphous silicon is represented by the symbol a-Si:H in recognition of the fact that the material in addition to having an amorphous (noncrystalline) structure also contains a nonstoichiometric amount of hydrogen, which is essential to its functioning as a semiconductor. a-Si-H is produced by Plasma Enhanced Chemical Vapor Deposition (PECVD) of silane on a substrate. The substrate temperature is maintained at close to 275° C. to obtain the desired material. If the temperature is raised above 275° C. in subsequent processing, the hydrogen tends to leave the amorphous silicon, degrading its performance. This limits the options for applying metallization to the semiconductor surface in the same way that polymer substrates impose a limit on printed wiring boards.
The primary use of amorphous silicon is to create arrays of Thin Film Transistors (TFTs) for example in Active Matrix Liquid Crystal Displays (AMLCDs); in active matrix x-ray detectors; and as linear photosensitive elements in scanners and fax machines. These displays and optical sensors function by controlling or measuring the voltage imposed on each pixel by an individual TFT which is in turn controlled by a matrix of gate lines and data lines, thus the term active matrix. These electrical connections extend from side to side of the display and must be as narrow as possible to avoid blocking the light which passes through the display. In addition the gate lines must be much less than a micrometer thick to allow the PECVD layers to be applied over them in the inverted field effect TFT structure without breaks or cracks. As displays become larger, the demands on the electrical conductivity of the gate and data lines become more stringent to maintain the desired framing rate of the display. The ability of PARMOD™ technology to provide high conductivity conductors such as copper and silver by a fast, low-cost method is very advantageous.
The typical AMLCD consists of a low alkali glass substrate on which the active matrix is deposited. The most common inverted TFT structure is shown in cross section in
FIG. 1. A
general description of the fabrication of conventional TFTs is described, for example, in “TFT/LCDs” by T. Tsukada of Hitachi (Gordon & Breach, N.Y. 1996). The first step is to deposit the gate lines, which are approximately 10 micrometers wide and less than 300 nanometers thick by conventional thin film lithographic technique. Metal, typically chromium or a molybdenum-aluminum alloy is evaporated onto the glass to the required thickness. The glass is coated with a photoresist, the resist is photoimaged by a step and repeat process using a mask in the same way that silicon wafers are imaged to produce individual integrated circuits. The resist is then developed by dissolving away the unexposed material, and the gate lines are patterned by etching away the exposed metal, after which the resist is stripped.
A major difference from semiconductor manufacture is that the glass substrate is much larger than any wafer, and it has to be 100% perfect. There is no possibility of throwing away individual transistors that are defective, as is done in conventional IC manufacture. This combination of large scale and intolerance of defects makes the production of AMLCDs by conventional technology difficult and expensive. Most of the expense is associated with the patterning steps. As a result, the difficulty and the expense escalate rapidly as the size of the display increases.
The gate line pattern is then covered by PECVD layers of 1) a silicon nitride gate dielectric; 2) a-Si:H; and 3) a thin layer of (n
+
) a-Si:H, to make good electrical contact with the chromium and aluminum metallization for source and drain lines of the TFT. All of these layers can be applied one after the other in a single trip through the vacuum chamber of the CVD apparatus. The PECVD stack is then patterned by photolithography to create individual TFTs over each gate.
The Indium Tin Oxide (ITO) pixel is then sputter deposited and patterned photolithographically.
A chromium buffer layer is sputtered to a thickness of 10 nanometers to serve as a barrier between the sputtered aluminum source and drain metallization and the silicon and this is followed by the aluminum. The metal is patterned photolithographically to define the contact to the ITO pixel, which is also the TFT source, and the drain, which is part of the data line. The source-drain metallization serves as a mask to etch the (n
+
) layer and part of the a-Si:H to form the channel.
The array is finished by a patterned SiN layer to passivate the exposed amorphous silicon.
The number of patterning steps is five in all with current photolithographic methods for patterning being expensive, time consuming, and using and producing toxic substances.
It is an object of this invention to eliminate most or all of the expensive photolithographic patterning steps by low-cost printing steps.
It is a further object of this invention to replace low-conductivity evaporated metallization by high conductivity printed silver, copper or gold PARMOD™ metallization.
It is yet a further object of this inventio
Gleskova Helena
Kydd Paul H.
Wagner Sigurd
Dang Trung
Kebede Brook
Parelec, Inc.
Woodbridge Richard C.
Woodbridge & Associates P.C.
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