Master-slave provider architecture and failover mechanism

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C714S010000, C702S182000, C700S003000

Reexamination Certificate

active

08051324

ABSTRACT:
Described are techniques for executing an application on two or more processors. A first portion of one or more modules of the application is determined. A second portion of one or more modules of the application is determined. The first portion of modules is executed on each of the two or more processor. A first of said two or more processor is selected as an active processor. The second portion of modules is executed on the active processor and not on the other ones of said two or more processors.

REFERENCES:
patent: 6363453 (2002-03-01), Esposito et al.
patent: 6622261 (2003-09-01), Laranjeira et al.
patent: 6782489 (2004-08-01), Fleming
patent: 7539898 (2009-05-01), Highleyman et al.
patent: 2001/0029518 (2001-10-01), Badovinatz et al.
patent: 2003/0159083 (2003-08-01), Fukuhara et al.

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