Master electronics card with an adaptive bandwidth circuit

Details Master electronics card with an adaptive bandwidth circuit Master electronics card with an adaptive bandwidth circuit

2007-07-03

2007-07-03

Rinehart, Mark H. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S309000, C710S240000

Reexamination Certificate

active

10959584

ABSTRACT:
The bus circuit of a master electronics card in a backplane-based communications system adaptively grants the upstream bus to the slave electronics cards by the early termination of a scheduled number of grants to a slave electronics card when the bus circuit on the master electronics card detects idle cells.

REFERENCES:
patent: 4704628 (1987-11-01), Chen et al.
patent: 5872936 (1999-02-01), Eckstein
patent: 6016311 (2000-01-01), Gilbert et al.
patent: 6118791 (2000-09-01), Fichou et al.
patent: 6138200 (2000-10-01), Ogilvie
patent: 6252877 (2001-06-01), Kozaki et al.
patent: 6973509 (2005-12-01), McIntosh et al.
patent: 2001/0008563 (2001-07-01), Yamaura et al.
U.S. Appl. No. 10/738,283, filed Dec. 17, 2003, Ripy et al.

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