Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-06-29
2009-02-24
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C430S005000, C430S030000
Reexamination Certificate
active
07496881
ABSTRACT:
Embodiments of mask validation using simulated resist contours are presented herein. The mask validation system disclosed utilizes simulated resist contour of a mask useable for semiconductor device manufacture to validate printed resist geometries. The mask validation system further allows for the sampling of photolithographic simulations of the mask to obtain sampling points to form the simulated contours.
REFERENCES:
patent: 5553273 (1996-09-01), Liebmann
patent: 5900340 (1999-05-01), Reich et al.
patent: 6704695 (2004-03-01), Bula et al.
patent: 2005/0268256 (2005-12-01), Tsai et al.
Kubota, H., et al., “A Fast Method of Simulating Resist Pattern Contours Based on Mean Inhibitor Concentration”, Jpn. J. Appl. Phys., vol. 37 , pp. 5815-5820 (1998).
Dinh Paul
Intel Corporation
Lee & Hayes PLLC
Nguyen Nha T
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