Static information storage and retrieval – Addressing
Patent
1993-04-05
1994-09-20
LaRoche, Eugene R.
Static information storage and retrieval
Addressing
36523003, 365103, 36518901, G11C 800
Patent
active
053495632
ABSTRACT:
A mask ROM having a plurality of memory cell blocks, each composed of a main bit line, a ground line, and a plurality of memory cells for storing information. The mask ROM also includes a sense amplifier for reading the information stored in the memory cells via the main bit line. The mask ROM has a plurality of first block selecting means for selecting a memory cell block connected to the main bit line from a plurality of the memory cell blocks and a plurality of second block selecting means for selecting a memory cell block connected to the ground line from a plurality of the memory cell blocks. The first and second block selecting means are arranged alternately, with the memory cell block sandwiched therebetween.
REFERENCES:
patent: 4958326 (1990-09-01), Sakurai
patent: 5193076 (1993-03-01), Houston
patent: 5202843 (1993-04-01), Nakagawara
patent: 5245570 (1993-09-01), Fazio
Symposium VLSI Circuits, Mikiro Okada et al., "16 Mb ROM Design Using Bank Select Architecture" published in Aug., 1988.
Kabushiki Kaisha Toshiba
LaRoche Eugene R.
Nguyen Tan
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