Multi-port RAM having means for providing selectable interrupt s

Static information storage and retrieval – Addressing – Multiple port access

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365195, 36523006, G11B 700

Patent

active

053495640

ABSTRACT:
A multi-port RAM has a decoding portion for decoding a plurality of specific addresses for generating interruptions and a selection circuit for selecting some addresses from among the plurality of specific addresses. Since the plurality of addresses are selected for generating interruptions in parallel or in the sequence of time for each generation of an interruption, the data processing capability at the time of generation of interruptions can be improved.

REFERENCES:
patent: 4535428 (1985-08-01), Furman
patent: 4758991 (1988-07-01), Ichida
patent: 4956820 (1990-09-01), Hashimoto
patent: 5001671 (1991-03-01), Koo et al.
patent: 5036491 (1991-07-01), Yamaguchi
Advanced Micro Device 4-90, Apr. 10, 1989 "Am 2130/Am 2140".

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