Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-17
2006-01-17
Whitmore, Stacy A. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06988258
ABSTRACT:
A mask-programmable logic device includes logical building blocks that can be connected together to form various logical units for programmable logic. Functionality of a comparable conventional programmable logic device can be provided with fewer gates in this way than by providing all of the gates normally present on that comparable conventional programmable logic device, resulting in fewer unused gates in the devices once mask-programmed.
REFERENCES:
patent: 5055716 (1991-10-01), El Gamel
patent: 5289021 (1994-02-01), El Gamal
patent: 5341041 (1994-08-01), El Gamal
patent: 5825202 (1998-10-01), Tavana et al.
patent: 5874834 (1999-02-01), New
patent: 5926035 (1999-07-01), Raza
patent: 5943488 (1999-08-01), Raza
patent: 6091262 (2000-07-01), New
patent: 6094065 (2000-07-01), Tavana et al.
patent: 6118299 (2000-09-01), Raza
patent: 6242945 (2001-06-01), New
patent: 6490707 (2002-12-01), Baxter
patent: 6515509 (2003-02-01), Baxter
patent: 6526563 (2003-02-01), Baxter
Altera Corporation, “HardCopy Devices for APEX 20K Conversion Data Sheet,” Sep. 2001, ver. 1.0.
AMI Semiconductor, Inc.,. “Introducing XPressArray™: The Industry's First 0.18μ Hybrid Gate Array,” Jan. 2002 (downloaded Oct. 22, 2002 from http://www.amis.com/pdf/xpressarray bkgrdr.pdf).
AMI Semiconductor, Inc.,. “XPressArray™ 0.18μ Hybrid Gate Array” Feature Sheet, (downloaded Oct. 22, 2002 from http://www.amis.com/pdf/xpressarray_featuresheet.pdf).
AMI Semiconductor, Inc.,. “XPressArray™ 0.18μ Hybrid Gate Array” Data Sheet, (downloaded Oct. 22, 2002 from http://www.amis.com/pdf/xpressarray_datasheet.pdf).
AMI Semiconductor, Inc., Press Release: “AMI Semiconductor Launches Revolutionary Hybrid Gate Array Technology to Reduce Cycle Time, Unit Price and Slash NRE Costs by 70 Percent: New 0.18-micron XPressArray™ platform provides industry's first FPGA-to-ASIC conversion path for drop-in replacement of 1.8V Xilinx Virtex-E and Altera APEX-E,” Jan. 21, 2002 (visited Oct. 22, 2002 at http://www.amis.com
ews/020121_xpressarray.cfm).
Ang Boon Jin
Ng Bee Yee
Tan Kim Pin
Altera Corporation
Bowers Brandon
Fish & Neave IP Group of Ropes & Gray LLP
Ingerman Jeffrey H.
Whitmore Stacy A.
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